KING FAHD UNIVERSITY OF PETROLEUM AND MINERALS
                     ELECTRICAL ENGINEERING DEPARTMENT
                 EE-501, HW#1, 991, (DR. ZEINI J. AL SAATI)
                 ******************************************


                            // D R A F T \\


                         ON COMPUTER ARITHMETICS
                         ***********************

  [OBJECTIVES: GENERAL FAMILIARITY, HIGH SPEED, HARDWARE IMPLEMENTATION,
               SERIAL/ITERATIVE/MINIMAL HARDWARE, PIPELINEING, CONVERSIONS
               AMONG ALTERNATIVE, NOTATION, TYPICAL APPLICATIONS.] 


  I-SIGNED-DIGIT NUMBERS
  ----------------------

  (1) Explain why numbers represented in SD are redundant?.
      Why CSA is considered to be carry-free for the addition?.
      Is-there redundancy in CSA?.

  (2) Find canonical and minimal BSD representations for 167, -303,
      and 123.25.


  (3) Compare the 2's complement and BSD representations in terms of
      storage requirement.

  (4) Design a one digit addition for the BSD. See your notes.


  II. CARRY-LOOK AHEAD ADDITION
  -----------------------------

  (1) Investigate the 3-level CLA addition in the following cases. We are
      interested in finding the calculation time, the components needed,
      and the number of bits of the operands. Can you produce general
      formulae when the number of CLA levels is >3 ?.

      (a) Group adders and CLA generators are both 4-bits.
      (b) Group adders and CLA generators are both 8-bits.
      (c)  =      =     =   =      =      are 4-bits and 8-bits respectively.
      (d)  =      =     =   =      =       =  8-bits  =  4-bits     =       .



  III- COUNTERS AND COMPRESSORS
  -----------------------------

  (1) KOREN: PROBLEMS: 4.9-4.15.
  (2) Using the short-cut notation used in your notes implement the following
      counters and compressors.
  (3) Address the case of BSD counters and compressors.
  (4) Find algorithms and programs to help adding large numbers of operands
      of one or more kilo bits (1 kilobits = 1024 bits).


  IV-MULTIPLICATION: TWO AND MULTI-OPERANDS
  -----------------------------------------

  TWO-OPERAND MULTIPLICATION
  --------------------------

  (1) Iterative (Add & Shift) multiplication. High-radix multiplication.
      Recoding, string propert and Booth's multipliers. 

  (2) Design of NMMs, and AMMs: design, time, components, and generalization.

  (3) Design of (n,p) array multipliers:  = ,     =     ,       =           .

  (4) Design of (n,p) Dadda multipliers:  = ,     =     ,       =           . 


  MULTIPLE OPERAND  MULTIPLICATION
  --------------------------------

  (1) Iterative multiplication: long, but saves components or use available
      resources.
  (2) Design using standard 2-operand units.
  (3) Design using same approach as 2-operands multiplication.
  (3) Design using multiple-operand NMM, and AMM units.
  (4) Design using stand-alone units.
  (5) Application in public-key cryptography and in polynomial functios
      implementation.


  VI- OLD EXAMS AND TESTS
  -----------------------

      Although, the material covered and the emphasis of this xourse has
      eveolved over the last several years, it is good to see the kind of
      questions that can be made. Koren also provide interesting questions
      and problems.